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SystemC is a set of classes and macros which provide an simulation interface (see also ). These facilities enable a designer to simulate, each described using plain. SystemC processes can communicate in a simulated real-time environment, using signals of all the offered by C, some additional ones offered by the SystemC library, as well as user defined. In certain respects, SystemC deliberately mimics the and, but is more aptly described as a system-level modeling language.
SystemC is applied to system-level, architectural exploration, performance modeling, and. SystemC is often associated with (ESL) design, and with (TLM).
Contents. Language specification SystemC is defined and promoted by the Open SystemC Initiative (OSCI — now ), and has been approved by the IEEE Standards Association as IEEE 1666-2011 - the SystemC Language Reference Manual (LRM). The LRM provides the definitive statement of the semantics of SystemC.
OSCI also provide an open-source proof-of-concept simulator (sometimes incorrectly referred to as the reference simulator), which can be downloaded from the OSCI website. Although it was the intent of OSCI that commercial vendors and academia could create original software compliant to IEEE 1666, in practice most SystemC implementations have been at least partly based on the OSCI proof-of-concept simulator. SystemC has semantic similarities to and, but may be said to have a syntactical overhead compared to these when used as a. On the other hand, it offers a greater range of expression, similar to and template classes. Although strictly a C class library, SystemC is sometimes viewed as being a language in its own right.
Source code can be compiled with the SystemC library (which includes a simulation kernel) to give an executable. The performance of the OSCI open-source implementation is typically less optimal than commercial VHDL/Verilog simulators when used for simulation. SystemC version 1 included common features such as structural hierarchy and connectivity, clock-cycle accuracy, delta cycles, (0, 1, X, Z), and bus-resolution functions. From version 2 onward, the focus of SystemC has moved to communication abstraction, and virtual-platform modeling.
SystemC version 2 added abstract ports, dynamic processes, and timed event notifications. Language features Modules SystemC has a notion of a container class called a module. This is a hierarchical entity that can have other modules or processes contained in it. Modules are the basic building blocks of a SystemC design hierarchy.
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A SystemC model usually consists of several modules which communicate via ports. The modules can be thought of as a building block of SystemC. Ports Ports allow communication from inside a module to the outside (usually to other modules) via channels.
Signals SystemC supports resolved and unresolved signals. Resolved signals can have more than one driver (a bus) while unresolved signals can have only one driver. Exports Modules have ports through which they connect to other modules. SystemC supports single-direction and bidirectional ports.
Exports incorporate channels and allow communication from inside a module to the outside (usually to other modules). Processes Processes are used to describe functionality. Processes are contained inside modules. SystemC provides three different process abstractions to be used by hardware and software designers.
Processes are the main computation elements. They are concurrent. Channels Channels are the communication elements of SystemC.
They can be either simple wires or complex communication mechanisms like. Elementary channels:. signal: the equivalent of a wire. buffer.
fifo. mutex. semaphore Interfaces Ports use interfaces to communicate with channels. Events Events allow synchronization between processes and must be defined during initialization. Data types SystemC introduces several data types which support the modeling of hardware.
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